Principal Design Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Required

Qualifications

• B.E./B.Tech or M.Tech/M.S. in Electronics, VLSI, or related field 8–10 years of hands-on DV experience in semiconductor/ASIC/SoC companies Deep expertise in SystemVerilog and UVM (Universal Verification Methodology)
• Strong understanding of digital design fundamentals — RTL, timing, clocking, resets Experience with industry-standard simulators: Xcelium, VCS, Quest…