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Principal Design Verification Engineer

Renesas · Campbell, Santa Clara County, United States

Posted Oct 1, 2026 · 6h ago

Location
Campbell, California, United States
Seniority
Principal
Listing language
English

Description

Principal Design Verification Engineer Job Description We are seeking a Principal Design Verification Engineer to provide technical leadership for verification of next-generation semiconductor memory interface products, including data buffer silicon.

This role will drive verification strategy and execution for complex digital designs, working closely with design teams to ensure functionality, performance, and product

requirements

are met.

The ideal candidate brings deep semiconductor verificati…

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