Senior DDR PHY Design Engineer — High-Speed Analog & SI

Brightecs Innovation Pte.

Ltd. is seeking an experienced engineer to design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6) in Singapore.

You will optimize PPA and SI while delivering robust silicon through JEDEC-compliant methods and advanced node implementations.

Responsibilities

include modeling channel losses, crosstalk, jitter and eye diagrams, designing impedance-matching networks, and collaborating with layout, digital, verification and firmware teams to ensure J-1…