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Senior FPGA Engineer

Skills

agilefpgaitarmatlaboscilloscopesignal processingsimulinkverilogvhdl

Description

We are seeking a highly skilled FPGA Engineer to design, implement, verify, and integrate high-performance digital logic for advanced communication and processing systems as part of Impulse’s next generation of space vehicles. The ideal candidate will have strong HDL development experience, practical understanding of high-speed digital architectures, and hands-on lab debugging skills.

  • Develop, implement, and optimize FPGA designs using VHDL or Verilog
  • Perform high-speed digital integration, including multi-clock domain interfaces, timing closure, and advanced clock-constraint management
  • Architect FPGA data paths with an emphasis on throughput, parallelism, and resource efficiency
  • Implement and integrate AXI4/AXI-Stream interfaces and related on-chip bus architectures
  • Design and manage FPGA clocking using PLL and MMCM primitives
  • Use Xilinx and Intel/Altera FPGA tools for synthesis, place-and-route, constraint definition, and timing analysis
  • Build self-checking testbenches for functional verification and regression coverage
  • Debug FPGA designs in the lab using logic analyzers, oscilloscopes, and FPGA debug tools such as Chipscope or SignalTap
  • Collaborate with DSP, systems, and software teams to define hardware architectures and support algorithm implementation
  • Bachelor's degree in Electrical Engineering, Optical Engineering, or related technical discipline.
  • Minimum 5+ years of experience in the optical communications field
  • Expertise in HDL development using VHDL or Verilog
  • Experience with high-speed digital design, timing closure, and parallel data path architectures
  • Familiarity with AXI4/AXI-Stream interface standards
  • Proficiency with Xilinx (Vivado) and Intel/Altera (Quartus) FPGA toolchains
  • Experience with FPGA clocking resources (PLL, MMCM) and multi-clock domain integration
  • Strong understanding of digital logic, state machines, pipelining, and data-path design
  • Ability to create and maintain self-checking testbenches for module-level and system-level verification
  • Hands-on experience with lab debugging and FPGA hardware bring-up
  • 3+ years of experience implementing DSP algorithms in hardware
  • 3+ years of experience with advanced communication systems or signal-processing architectures
  • Familiarity with MATLAB/Simulink for algorithm modeling and hardware mapping
  • Self-motivated with proven ability to communicate technical challenges, explain rationale and resolve critical issues
  • Experience in a startup or fast paced agile development environment

Additional Information:
Compensation bands are determined by role, level, location, and alignment with market data. Individual level and base pay is determined on a case-by-case basis and may vary based on job-related skills, education, experience, technical capabilities and internal equity. In addition to base salary, for full-time hires, you may also be eligible for long-term incentives, in the form of stock options, and access to medical, vision & dental coverage as well as access to a 401(k) retirement plan.
Impulse Space’s spacecraft manufacturing business is subject to U.S. export regulations including the International Traffic in Arms Regulations (ITAR) and Export Administration Regulations (EAR). This position requires applicants to be either U.S. Persons (i.e., U.S. citizen, U.S. national, lawful permanent U.S. resident (green card holder), an individual granted asylum in the U.S., or an individual admitted in U.S. refugee status) or persons eligible to obtain an export license from the U.S. Departments of State, Commerce, or other applicable U.S. government agencies. Learn more about the ITAR here.

Impulse Space is an Equal Opportunity Employer; employment with Impulse Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

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