Senior Signal Integrity Engineer

You will own signal integrity end to end — from silicon package, through the board, to the system channel.

Senior IC role with architectural influence: you won't be handed a closed spec to verify, you'll help define it.

What you will work on: Full-wave extraction and SI closure for a multi-die AI accelerator package PCIe Gen6 (PAM4) channel design and compliance margining LPDDR6 interface design, timing budget and bus-level closure SI ownership on a rack-scale system: backplane, connectors, cab…