Senior Verification Engineer
Salary: £85,000 - 85,000 per year
Requirements
- Degree in Electronic Engineering, Computer Engineering, or a related discipline. At least 3 years experience verifying digital ASIC and/or FPGA designs.
- Strong SystemVerilog and UVM experience. Good understanding of RTL design principles and hardware implementation. Experience with coverage-driven and assertion-based verification. Linux proficiency with Python, Tcl or Bash scripting skills.
- Strong analytical, debugging and problem-solving skills. …